Marques, Eduardo
Results: Displaying 10 of 41 on page 3 of 5
Name
Title
Area
Document
Colleges
Year
LALP: a language for parallelism of loops exploitation in reconfigurable computi...
Implementation of an Ethernet 10/100Mbps core with Avalon interface for Nios II processor...
Implementação do método de campos potenciais para navegação de robôs móveis baseada...
LALP+ : a framework for developing FPGA-based hardware accelerators
A framework for the hardware/software codesign for the dynamic module of the Brazilian...
Design of an open source processor in Bluespec based on Altera Nios II soft-core...
Optimizing C source-code for the Nios II embedded processor
Implementation of on-chip AMBA bus based on Reconfigurable Computing
A on-chip hardware/software monitoring system based on reconfigurable computing
Results: Displaying 10 of 41 on page 3 of 5