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Master's Dissertation
DOI
10.11606/D.3.2008.tde-18082008-154538
Document
Author
Full name
Filippo Valiante Filho
Institute/School/College
Knowledge Area
Date of Defense
Published
São Paulo, 2008
Supervisor
Committee
Horta, Edson Lemos (President)
Del Bianco Filho, Orlando
Strum, Marius
Title in Portuguese
Ferramentas e metodologias de desenvolvimento para sistemas parcialmente reconfiguráveis.
Keywords in Portuguese
Arquitetura reconfigurável
CAD
Circuitos FPGA
Circuitos integrados
Computação reconfigurável
Microeletrônica
Abstract in Portuguese
Alguns tipos de FPGA (Field Programmable Gate Array) possuem a capacidade de serem reconfigurados parcialmente em tempo de execução formando um Sistema Parcialmente Reconfigurável (SPR), cuja utilização traz diversas vantagens dentre as quais a redução de custos. A maior utilização de SPRs enfrenta, como um dos fatores limitantes, a dificuldade de acesso e de utilização de ferramentas de desenvolvimento apropriadas. Este trabalho aborda os SPRs, suas aplicações e uma análise das ferramentas de desenvolvimento existentes. posteriormente dedica-se ao aperfeiçoamento de uma dessas ferramentas, o PARBIT, com o desenvolvimento de uma interface gráfica de usuário (GUI, -- Graphical User Interface) e a atualização de sua metodologia de desenvolvimento. As metodologias de projeto suportadas pelo fabricante do FPGA também são apresentadas. As metodologias são validadas através do projeto de um SPR.
Title in English
Development tools and methodologies for partial reconfigurable systems.
Keywords in English
CAD for FPGAs
FPGA
Partial reconfigurable system
Reconfigurable architecture
Reconfigurable logic
Abstract in English
Some types of FPGA (Field Programmable Gate Array) can be partially reconfigured during run-time forming a Partial Reconfigurable System (PRS). The use of PRSs brings several advantages like cost reduction. A larger use of PRSs faces a limiting factor: the difficult to access and use appropriate development tools. This work shows the PRSs, its applications and an analysis of the existing development tools. Later, it dedicates to the improvement of one of these tools, the PARBIT, developing a graphical user interface (GUI) and updating its project methodology. The project methodologies supported by the manufacturer of the FPGA are also presented. The methodologies are validated through the design of a PRS.
 
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Publishing Date
2008-08-22
 
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