• JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
  • JoomlaWorks Simple Image Rotator
 
  Bookmark and Share
 
 
Master's Dissertation
DOI
Document
Author
Full name
Fredy Joao Valente
Institute/School/College
Knowledge Area
Date of Defense
Published
São Carlos, 1991
Supervisor
Committee
Ruggiero, Carlos Antonio (President)
Tannus, Alberto
Traina Junior, Caetano
Title in Portuguese
Proposta e simulação de uma arquitetura RISC
Keywords in Portuguese
Arquitetura de computadores
RISC
Simulação de arquiteturas
Abstract in Portuguese
RISC - Uma nova tendência em arquitetura de computadores. Este trabalho apresenta um estudo de como surgiu esta nova arquitetura, e suas características básicas, que a diferencia das arquiteturas convencionais. Uma proposta de microprocessador RISC é apresentada, com sua rota de dados completamente detalhada. Um simulador para arquitetura RISC foi então construído, para se testar este microprocessador. Para validar o simulador, que é a idéia principal deste trabalho, e para se avaliar a arquitetura do microprocessador proposto, usou-se o benchmark Dhrystone, e os resultados foram comparados com máquinas comerciais.
Title in English
Design and simulation of a RISC architecture
Keywords in English
Architecture simulation
Computer architecture
RISC
Abstract in English
RISC - A new trend in computer architecture. This work presents a study of how this new architecture emerged, and the basic caracteristics that diferentiate it from the conventional architectures. A proposed RISC microprocessor is presented with the completely detailed data-path. A simulator for the RIse architecture was built to test this microprocessor. To validate the simulator, which is the main idea of this work, and to evaluate the architecture of the proposed microprocessor, the Dhrystone benchmark was used and the results were compared with commercial machines.
 
WARNING - Viewing this document is conditioned on your acceptance of the following terms of use:
This document is only for private use for research and teaching activities. Reproduction for commercial use is forbidden. This rights cover the whole data about this document as well as its contents. Any uses or copies of this document in whole or in part must include the author's name.
FredyJoaoValenteM.pdf (2.47 Mbytes)
Publishing Date
2014-04-24
 
WARNING: Learn what derived works are clicking here.
All rights of the thesis/dissertation are from the authors
CeTI-SC/STI
Digital Library of Theses and Dissertations of USP. Copyright © 2001-2020. All rights reserved.